My name is Ray Chambers. I'm a specialist in computing and have a first class honours degree in computer science. I'm currently the lead teacher of computer science at Brooke Weston Academy in Corby Northamptonshire. I have been teaching for roughly 8 years and I thoroughly enjoy my job. In 2015 I was fortunate to win the Pearson National Teaching Award for innovative use of technology. I also won the BAFTA for mentoring young coders.

Last updated

22 February 2018

pptx, 533.79 KB
pptx, 533.79 KB
This lesson works on the assumption that students have already been introduced to the Arithmetic Logic unit and section (a) of the 1.1.1 spec. This lesson covers: -

(b) 鈥� The fetch-decode-execute cycle, including its effect on registers.

(c) 鈥� The factors affecting the performance of the CPU, clock speed, number of cores, cache.

It includes some starter exam questions around the registers and answers are included in the presentation. Students will be expected to answer these questions. There is a research based task at the end which gets them to research other factors which have an impact on the CPU performance.

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